Driving technical innovation to improve AMD's capabilities a cross validation, test content automation, validation methodology enhancement, and various internal and cross functional technical initiatives Debugging issues found during the process , bring up, validation, and production phases of SOC program s Working with multiple teams, and tracking test execution to make

Drive workload and application level strategies internally and with industry partners / ecosystem. Partner with SoC design teams in providing a unified and clear platform / system level vision to influence AMDs SoC roadmap. Drive reference platform requirements and partner with engineering on balance of internal / external execution. Represent AMD datacenter system level

Working with Architects and reads documentation to understand features to be implemented and verified Block level test plan creation with the fully understanding of Design Specification UVM block level test bench creation and maintenance Block level test creation in directed and random constraints covering all features usage model and corner cases, for both function and p

As an AI ML System Architect, you will be responsible for analyzing AI models, quantizing models for various data types for efficiency/ latency/ throughput tradeoffs and proposing implementation on AMDs Adaptive SoC platform for embedded applications. The job also requires the candidate to have the capability to generate test vectors for the AI Models for improvement of t

Create strong links and relationships between AMD and Partner consumer marketing and Alliance teams Build links within regional marketing to enable strong relationships in region Develop and manage WW co marketing funds and program terms; Communicate strategies and fund guidelines to regions and own WW plan roll ups Partner with HP on executing global and regional co mark

Creates and enables efficient geographically agnostic processes and tools to optimize quality and consistency of Cadence CAD designs. Proactively explores, pathfinds, and supports state of the art Cadence PCB design and EDA tools and processes to support our internal teams Capable of debugging and solving technical Cadence PCB design and working directly with Cadence for

Driving technical innovation to improve AMD's capabilities a cross product development and validation, including tool and scrip t development, technical and procedural methodology enhancement, and various internal and cross functional initiatives Debugging issues found during the SOC (System on a Chip) programs bring up, validation, and production phase s Working with mul

Design, develop, debug, verify and/or validate firmware, software and/or hardware Participant in day to day firmware development work Provide consultation to internal and external customers regarding AMD features and programming requirements PREFERRED EXPERIENCE Prior years of experience and/or education within the semiconductor industry Experience producing quality firmw

Work within and coordinate with a small team to analyze, implement, and optimize DirectML TensorFlow and PyTorch for machine learning models Collaborate with ISV, library, compiler, driver, and hardware engineers to influence strategic decisions to achieve the highest performance for DirectML Innovate new algorithmic improvements that exploit the strengths of the hardware

Develop technical specifications and processes for the DPPM Data Center to identify manufacturing issues and logical failures. Create software for the At scale automated test DPPM Data Center, collaborating with platform, silicon, debug tools, IT teams, and other stakeholders. Drive continuous technical improvements in testing, failure identification, and the debugging pr

AMD EPYC CPU topology Integration Design, develop, and validate K8S features that are aware of EPYC chip let architecture for optimal resource allocation. This will involve strong collaborate with core Cloud Native, Hardware, and Performance team members to understand behavior of various cloud native workloads on AMD EPYC processors. Performance Tuning Conduct performance

Collaborate with design, validation, and architecture teams for content coverage, test pattern development, validation, and debugging Develop test program infrastructure incorporating latest Best Known methods Solves sophisticated, novel, and non recurring problems; initiates significant changes to existing processes/ methods and leads development and implementation Ident

Develop drivers for existing and upcoming Radeon GPUs. Debug challenging low level driver, hardware and OS issues. Optimize performance of important 3D graphics content, especially AAA PC games. Participate in a team culture that values open communication and strong commitment to code quality. Collaborate with hardware architects, OS architects, OEM customers, game develo

Work with the HW, ASIC, SW, and FW teams to provide signal and power integrity needs for the product Deep knowledge of high speed SerDes Perform simulations for SoC package, and PCB designs, while working with cross functional teams to optimize the design for signal and power integrity performance, quality, and correctness Develop simulation methodologies, and design sign

Define, plan and drive projects and program plans based on management and senior technical guidance Scope technical feasibility of new Products/Features by clarifying and analyzing requirements with SW/HW Architects, Technical Leads and SW Engineers Develop SW program schedule by considering various Driver, SW Stack components and HW/FW dependencies, negotiate and create